Currently, one of the challenges of integrated circuit design and manufacturing is to reduce resistive capacitive delay during signal transmission. One solution is to replace an aluminum layer with a copper layer to lower the serial metal resistance. Another solution is to form low-k porous films or air gaps between the metal layers to reduce the parasitic capacitance.
FIG. 1 shows a conventional method for fabricating an interconnect structure. The fabrication method includes: providing a substrate 5 and forming semiconductor devices on the substrate 5; depositing a low-k film 4 on the substrate 5; forming a mask 6 on the low-k film 4; patterning the low-k film 4 using the mask 6 to create through-holes (not illustrated); and filling the through-holes with metal to create an interconnect structure connecting to the semiconductor devices. Specifically, the low-k film 4 is porous and the mask 6 is a hard mask.
The porous film contains pores with a dielectric constant of 1, which is lower than the dielectric constant of material surrounding the pores, offering the porous film a lower dielectric constant. In a practical process, however, mechanical strength of the interconnect structure inside the porous film is found weak. The porous film tends to be damaged during subsequent processes (e.g., including a chemical mechanical planarization to remove excessive metal), thus lowering the manufacturing yield of the interconnect structure.